Fault Reduction in Nonoscale VLSI Interconnection by Using Carbon Nanotubes Technology
Science Journal of Circuits, Systems and Signal Processing
Volume 3, Issue 4, August 2014, Pages: 26-30
Received: Sep. 1, 2014;
Accepted: Oct. 25, 2014;
Published: Nov. 28, 2014
Views 2502 Downloads 109
Behzad Lotfy, Department of Engineering, Hakim Nezami High Education Institute, Qouchan, Iran
Houshang Salehi, Department of Engineering, Hakim Nezami High Education Institute, Qouchan, Iran
Follow on us
As the VLSI technology scales down, significant challenges are facing the fabrication, modeling, and performance of the integrated circuits. One of the major challenges for the continuiation of the Moore’s law is “interconnects” at nano-scale. Interconnects become as important as transistors in the current technologies and will dominate the chip performance at the future technologies. Beside their eletrical performance, their mechanical performnace will be important at the nano-scale. Wires should be resilient enough to cope with Back-End-Of-Line (BEOL) processes. Nano-technology has offered us many solutions to current technology problems. One of the major gift of this technology is Carbon Nanotubes (CNT). CNTs are a promising candidate to replace copper interconnects. They not only provide us with ballistic transport for semiconductors, but also have better mechanical performance. In this paper, we study the mechanical reliability of the CNT interconnects and compare it with their copper conterparts.
Copper Nano-Wire, Carbon Nanotubes, Fault Tolerance, Interconnections, VLSI
To cite this article
Fault Reduction in Nonoscale VLSI Interconnection by Using Carbon Nanotubes Technology, Science Journal of Circuits, Systems and Signal Processing.
Vol. 3, No. 4,
2014, pp. 26-30.
M. Haykel, K. Moselund, D. bouver , 2005, Fault Tolerant Multi Level Logic Decoder for Nanoscale Crossbar Memory Arrays, Integerted Systems Laboratory Switzerland.
M. Heyken Ben Jama, 2009, Fabrication and Design of Nanoscale Regular Circuits, International Conference on Nano Networks.
Y. Jin, F. Yuan, 2003, Simulation of elastic properties of single-walled carbon nanotubes, North Carolina State University.
H. Heidari, S. Mirza Kochaky , M. Babai , 2008, Simulation of Model For Reliability of Nano Wire in Field Programmable Nanowire Interconnect Electronic, Engineering Department of Elmo Sanat University.
K. Banerjee, N. Srivastava , 2006, Are Carbon Nanotubes the Future of VLSI Interconnections?, San Francisco.
A. Coker, 2008, Performance Analysis of Fault-tolerant Nano-Electronic Memories, Texas A&M University.