Please enter verification code
Confirm
A Performance Comparison of CMOS Voltage-Controlled Ring Oscillators for its Application to Generation and Distribution Clock Networks
Science Journal of Circuits, Systems and Signal Processing
Volume 2, Issue 2, April 2013, Pages: 56-66
Received: Apr. 23, 2013; Published: May 20, 2013
Views 3612      Downloads 239
Authors
Mónico Linares Aranda, Dept. Instituto Nacional de Astrofísica, Óptica y Electrónica, Departamento de Electrónica, Puebla, Pue., México
Oscar González Díaz, Dept. Instituto Nacional de Astrofísica, Óptica y Electrónica, Departamento de Electrónica, Puebla, Pue., México
Carlos Ramón Báez Álvarez, Dept. Instituto Nacional de Astrofísica, Óptica y Electrónica, Departamento de Electrónica, Puebla, Pue., México
Article Tools
PDF
Follow on us
Abstract
In this work, a performance comparison of expanded CMOS voltage-controlled ring oscillators for non-resonant local clock generation and distribution networks is presented. Several differential and single-ended ring oscillators are designed and fabricated using long interconnection lines to achieve wide coverage chip. A test chip containing the several oscillators was fabricated using an Austria Microsystems (AMS) 0.35 μm CMOS technology. Experimental results show that it is possible to generate and distribute high frequency signals (GHz range) on a relativity large area (coverage) and low phase noise using non-resonant ring oscillators. This represents an attractive alternative for the design and implementation of local Clock Generation and Distribution Networks for systems on chip.
Keywords
Ring Oscillators, VCOs, Clock Networks, CMOS VLSI
To cite this article
Mónico Linares Aranda, Oscar González Díaz, Carlos Ramón Báez Álvarez, A Performance Comparison of CMOS Voltage-Controlled Ring Oscillators for its Application to Generation and Distribution Clock Networks, Science Journal of Circuits, Systems and Signal Processing. Vol. 2, No. 2, 2013, pp. 56-66. doi: 10.11648/j.cssp.20130202.14
References
[1]
G. N. Ranganathan and N. P. Jouppi, "Evaluating the Potential of Future On-Chip Clock Distribution using Optical Interconnects," HP Technical Report, pp. 1–14, Oct. 2007.
[2]
M. S. Laurent and M. Swaminathan, "A Multi-PLL Clock Distribution Architecture for Gigascale Integration," IEEE Computer Society Workshop on VLSI, pp. 30–35, Apr. 2001.
[3]
R. Chang, "Near Speed-of-Light On-Chip Electrical Interconnects," PhD Thesis, Stanford University, Nov. 2002.
[4]
Vadim Gutnik, Anantha Chandrakasan, "Active GHz Clock Network using Distributed PLLs," IEEE International Solid-State Circuits Conference, vol. 35, no. 11, pp. 1553 – 1560. Nov. 2000.
[5]
G.A. Pratt and J. Nguyen, "Distributed Synchronous Clocking," IEEE Transactions on Parallel Distributed Systems, vol.6, no. 3, pp. 314-328, March 1995.
[6]
H. Mizuno and K. Ishibashi, "A Noise-Immune GHz-Clock Distribution Scheme using Synchronous Distributed Oscillators," IEEE International Solid-State Circuits Conference Digest Technical Papers, 404-405, 1998.
[7]
H.-A. Tanaka, A. Hasegawa, H. Mizuno, and T. Endo, "Synchronizability of Distributed Clock Oscillators," IEEE Transactions on Circuits and Systems I, vol. 49, no. 9, pp. 1271-1278, Sep. 2002.
[8]
J. Wood, C. Edwards, and S. Lipa, "Rotary Traveling-Wave Oscillator Arrays: a New Clock Technology," IEEE Journal of Solid-State Circuits, vol. 36, no. 11, pp. 1654-1665, Nov.2001.
[9]
S.C. Chang, K.L. Shepard, and P.J. Restle, "1.1 to 1.6 GHz Distributed Differential Oscillator Global Clock Networks," IEEE International Solid-State Circuits Conf. Dig. Tech. Papers, pp. 518-519, 2005.
[10]
H. Wu and A. Hajimiri, "Silicon-Based Distributed Voltage Controlled Oscillators," IEEE Journal of Solid-State Circuits, vol. 36, no. 3, pp. 493-502, Mar. 2001.
[11]
Bendik Kleveland. Carlos H. Diaz. Dieter Vook, Liam Madden, Thomas H. Lee, and S. Simon Wong, "Monolithic CMOS distributed amplifier and oscillator," IEEE International Solid-State Circuits Conference Digest Technical Papers, pp. 70–71, Feb. 1999.
[12]
Vernon L. Chi, "Salphasic distribution of clock signals for synchronous systems," IEEE Transactions on Computer, vol. 43, pp. 597–602, May 1994.
[13]
H. Larsson, "Distributed synchronous clocking using connected ring oscillators," Master’s thesis, Computer Systems Engineering Centre for Computer System Architecture, Halmstad, Sweden, Jan. 1997.
[14]
Frank P. O’Mahony, "A 10 GHz global clock distribution using coupled standing- wave oscillators," PhD Thesis, 2003.
[15]
John Wood, Terence C. Edwards, Steve Lipa, "Rotary Traveling-Wave Oscillator Arrays: A New Clock Technology," IEEE Journal of Solid-State Circuits, vol. 36, no. 11, pp. 1654–1664, Nov. 2001.
[16]
T. Shibasaki, H. Tamura, K. Kanda, H. Yamaguchi, J. Ogawa, and T. Kuroda, "18-GHz Clock Distribution Using a Coupled VCO Array," IEICE Transactions on Electronics, vol. E90-C, no. 4, pp. 811–822, Apr. 2007.
[17]
L. Hall, M. Clements, W. Liu, and G. Bilbro, "Clock distribution using cooperative ring oscillators," IEEE 17th Conference on Advanced Research in VLSI, pp. 62-75, 1997.
[18]
M. S. Maza, O. Gonzalez-Diaz, and M. Linares-Aranda, "On-chip Clock Network using Interconnected and Coupled Ring Oscillators," 15th IEEE International Conference on Electronics, Circuits and Systems, pp. 518–521, August 2008.
[19]
M. Salim-Maza, "Generación y Distribución de Señal de Reloj para Sistemas en Chip utilizando Anillos Interconectados Acoplados," PhD. Thesis, INAOE, Puebla, México, June 2005.
[20]
B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, New York, 2001, pp. 482.
[21]
Mostafa Savadi Oskooei, Ali Afzali-Kusha, S. M. Atarodi, "A High-Speed and Low-Power Voltage Controlled Oscillator in 0.18-μm CMOS Process," IEEE International Symposium on Circuits and Systems, pp. 933-936, Jun. 2007.
[22]
A. Ahmed, K.Sharaf, H. Haddara, H.F. Ragai, "CMOS VCO-Prescaler Cell-Based Design for RF PLL Frequency Synthesizers," IEEE International Symposium on Circuits and Systems, vol. 2, pp. 737-740, Aug. 2002.
[23]
Yalcin Alper Eken, John P. Uyemura, "A 5.9-GHz Voltage Controlled Ring Oscillator in 0.18 μm CMOS," IEEE Journal of Solid-State Circuits, vol. 39, no. 1, pp. 230-233, Jan. 2004.
[24]
Daniel Pacheco Bautista, Mónico Linares Aranda, "A Low Power and High Speed CMOS Voltage-Controlled Ring Oscillator," IEEE International Symposium on Circuits and Systems, pp.,752-755, 2004.
[25]
Liang Dai, Ramesh Harjani, "Design of high performance CMOS voltage controlled oscillators," Kluwer Academic Publishers 2003.
[26]
S. Joeres, A. Kruth, O. Meike, G. Ordu, S. Sappok, R. Wunderlich and S. Heinen, "Design of a Ring-Oscillator with a Wide Tuning Range in 0.13 μm CMOS for the use in Global Navigation Satellite Systems," 15th ProRISC Workshop, pp. 529–535, 2004.
[27]
Chan-Hong Park, Beomsup Kim, "A Low-Noise, 900-MHz VCO in 0.6- m CMOS," IEEE , Journal of Solid-State Circuits, Vol. 34, No. 5, pp. 586-591, May. 1999.
[28]
Fadi H. Gebara, Jeremy D. Schaub, Alan J. Drake, Kevin J. Nowka, Richard B. Brown, "4.0GHz 0.18μm CMOS PLL Based on an Interpolative Oscillator," Symposium on VLSI Circuits Digest of Technical Papers, pp. 100-103, 2005.
[29]
Gonzalez, Diaz Oscar, PhD Thesis, National Institute for Astrophysics, Optics and Electronics (INAOE), Puebla, Mexico, June, 2011.
[30]
M. Takahashi et al, "VCO Jitter Simulation and Its Comparison with Measurement," IEEE Asia and South Pacific Design Automation Conference, pp. 85–88, Jan. 1999.
[31]
Lin Zhang, Aaron Carpenter, Berkehan Ciftcioglu, Alok Garg, Michael Huang, and Hui Wu, "Injection-Locked Clocking: A Low-Power Clock Distribution Scheme for High-Performance Microprocessors," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 16, no. 9, pp. 1251-1256, Sep. 2008.
[32]
Wei-Hsuan Tu, Jyh-Yih Yeh, Hung-Chieh Tsai, Chorng-Kuang Wang, "A 1.8V 2.5-5.2 GHz CMOS Dual input Two stage Ring VCO," Proceedings of the 2004 IEEE Asia Pacific Conference on Advanced System Integrated Circuits, pp.134–137, Aug. 2004.
[33]
R. Tao and M. Berroth, "Low Power 10 GHz ring VCO using Source Capacitively Coupled Current Amplifier in 0.12 μm CMOS Technology," Electronics Letters, vol. 40, no. 23, Nov, 2004.
[34]
Chan-Hong Park, Beomsup Kim, "A Low-Noise, 900-MHz VCO in 0.6- m CMOS," IEEE Journal of Solid-State Circuits, vol. 34, no. 5, pp. 586-591, May . 1999.
[35]
H. Q. Liu, W. L. Goh, L. Siek, "Design and frequency/phase-noise analysis of a 10-GHz CMOS ring oscillator with coarse and fine frequency tuning," Analog Integrated Circuits and Signal Processing, vol. 48, pp. 85–94, 2006.
[36]
Bassem Fahs, Walid Y. Ali-Ahmad, and Patrice Gamand, "A Two-Stage Ring Oscillator in 0.13-µm CMOS for UWB Impulse Radio". IEEE Transactions on Microwave theory and techniques, vol. 57, no. 5, pp. 1074-1082, May 2009.
[37]
Shohdy AbdEl Kader and Mohammed Dessouky, "A 10 GHz Ring VCO Using a Wide Range Delay Cell Architecture," International Conference on Microelectronics, pp. 189-192, 2009.
[38]
Sang-Yelp Lee, Shushed Namakwa, Noboru Ishihara, and Kazuya Matsu, "2.4–10 GHz Low-Noise Injection-Locked Ring Voltage Controlled Oscillator in 90nm Complementary Metal Oxide Semiconductor," Japanese Journal of Applied Physics, vol. 50, pp. 04DE03-1- 04DE03-5, 2011.
[39]
Hai Qi Liu, Liter Siek, Wang Ling Goh, Wei Meng Lim, "A 7-GHz multiloop ring oscillator in 0.18µm CMOS technology", Analog Integrated Circuits and Signal Processing vol. 56, pp. 179–184, 2008.
[40]
Hai Qi Liu, Wang Ling Goh, Liter Siek, Wei Meng Lim, and Yue Ping Zhang, "A Low-Noise Multi-GHz CMOS Multiloop Ring Oscillator With Coarse and Fine Frequency Tuning," IEEE Transactions on Very Large Scale Integration Systems, vol. 17, no. 4, pp. 571-577, April 2009.
[41]
Razvan Ionita, Mihai Sanduleanu, Andrei Vladimirescu, and Dan Steriu, "Ring Oscillator Based on R-NMOS Logic with Back-Gate Control," IEEE International Conference on Automation, Quality and Testing, Robotics, pp. 255-258. May 2006.
[42]
Jihai Duan, Zhilan He, Chunlei Kang, Jian Feng Wang, Jizuo Zhang, "A Multiloop Ring VCO Design in 0.18_m CMOS Technology," 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, pp. 99-101, Nov. 2010.
[43]
Changzhi Li, and Jenshan Lin," A 1–9 GHz Linear-Wide-Tuning-Range Quadrature Ring Oscillator in 130 nm CMOS for Non-Contact Vital Sign Radar Application," IEEE Microwave and Wireless Components Letters, vol. 20, no. 1, pp. 34-36, Jan 2010.
[44]
Yu-Sheng Tiao, Meng-Lieh Sheu, and Lin-Jie Tsao, "Low-Voltage and High-Speed Voltage-Controlled Ring Oscillator with Wide Tuning Range in 0.18_m Complementary Metal Oxide Semiconductor," Japanese Journal of Applied Physics vol. 50, 04DE11, pp. 1-6, 2011
[45]
Hiroshi Iwai, "Future of Silicon Integrated Circuit Technology", International Conference on Industrial and Information Systems, pp. 571- 576, 2007.
ADDRESS
Science Publishing Group
1 Rockefeller Plaza,
10th and 11th Floors,
New York, NY 10020
U.S.A.
Tel: (001)347-983-5186