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Parallel Implementation of the Wideband DOA Algorithm on Single Core, Multicore, Gpu and Ibm Cell be Processor
Science Journal of Circuits, Systems and Signal Processing
Volume 2, Issue 2, April 2013, Pages: 29-36
Received: Apr. 3, 2013; Published: Apr. 2, 2013
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Authors
Mohammad Wadood Majid, Department of Electrical Engineering & Computer Science, University of Toledo, Ohio, USA
Todd E. Schmuland, Department of Electrical Engineering & Computer Science, University of Toledo, Ohio, USA
Mohsin M. Jamali, Department of Electrical Engineering & Computer Science, University of Toledo, Ohio, USA
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Abstract
The Multiple Signal Classification (MUSIC) algorithm is a powerful technique for determining the Direction of Arrival (DOA) of signals impinging on an antenna array.The algorithm is serial based, mathematically intensive, and requires substantial computing power to realize in real-time.Recently, multi-core processors are becoming more prevalent and af-fordable.The challenge of adapting existing serial based algorithms to parallel based algorithms suitable for today’s mul-ti-core processors is daunting. DOA algorithm has been implemented on Multicore (Intel Nehalem Quad Core), NVIDIA’s GPU GeForce GTX 260, and IBM Cell Broadband Engine Processor. This is in an effort to use DOA for real time applications. The DOA algorithm has been parallelized, partitioned, mapped, and scheduled on Multi-Core, GPU, and IBM Cell BE processor.The parallel algorithm is developed in C# for Intel Nehalem Quad Core, a combination of C and CUDA for GPU, and C++ for IBM Cell processor. The algorithm has also been implemented on single core for comparison purposes. Wideband DOA algorithm is implemented assuming 16 and 4 sensors using Uniform Linear Array (ULA).
Keywords
Direction Of Arrival (DOA), Single Core, Multicore, GPU And IBM Cell BE Processor
To cite this article
Mohammad Wadood Majid, Todd E. Schmuland, Mohsin M. Jamali, Parallel Implementation of the Wideband DOA Algorithm on Single Core, Multicore, Gpu and Ibm Cell be Processor, Science Journal of Circuits, Systems and Signal Processing. Vol. 2, No. 2, 2013, pp. 29-36. doi: 10.11648/j.cssp.20130202.12
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