Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit
Science Journal of Circuits, Systems and Signal Processing
Volume 2, Issue 1, February 2013, Pages: 16-21
Received: Jan. 31, 2013; Published: Feb. 20, 2013
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Elham Khamsehashari, Department of Electrical Engineering, Ecole Polytechnique of Montreal, Montreal, H3C 3A7, Canada
Yves Audet, Department of Electrical Engineering, Ecole Polytechnique of Montreal, Montreal, H3C 3A7, Canada
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A current-mode image sensor architecture using a linear-logarithmic pixel in order to improve the dynamic range is presented. The pixel cell is based on a 3T active pixel structure with a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a linear-logarithmic response. An intrascene dynamic range of 90dB is obtained with a pixel fill factor of 37%. The readout circuit is composed of a first-generation current conveyor, a current memory employed as a delta reset sampling unit, a differential amplifier used as an integrator and a dynamic comparator. The pixel response operating mode is determined in the column readout. A signal is sent to the digital processing unit as an indicator to determine the pixel response operating mode in order to allow the proper analog to digital conversion. The image lag effect observed in the pixel output current is removed by the delta reset sampling circuit. Experimental results, obtained from a test structure, are presented. The circuit was fabricated in a CMOS 0.35um process from Austria Microsystems.
Active Pixel Sensor (APS), Combined Linear-Logarithmic Response, Delta Reset Sampling (DRS), Current Comparator (CMP)
To cite this article
Elham Khamsehashari, Yves Audet, Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit, Science Journal of Circuits, Systems and Signal Processing. Vol. 2, No. 1, 2013, pp. 16-21. doi: 10.11648/j.cssp.20130201.13
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